Precise-ITC 400GE with 8x56G PAM4 serdes and eSilicon 56G PAM4 LR serdes interoperability demo 2019

The demo verifies interoperability between eSilicon’s 56G PAM4 & NRZ DSP-based long-reach 7nm SerDes and the SerDes embedded in an Intel® Stratix® 10 FPGA. 400Gb/s FEC is implemented with the Precise-ITC E-pak 400G core instantiated in the Intel Stratix 10 FPGA