40G/100G Ethernet PCS/MAC IP Cores

EN/

40/100G Ethernet IP Cores

The Precise-ITC 40G/100G Ethernet IP cores are cutting edge solution to the 40G/100G Ethernet application.  It supports the Physical Coding Sublayer (PCS) for 64B/66B, type 40G/100GBASE-R function based on the IEEE 802.3.

There are 3 PCS Cores : 40GBASE-R, 100GBASE-R and 100GBASE-KR4 PCS+FEC Combined Cores. The PCS layer core supports 64B/66B encoding for transmission of data and control characters, and AM processing and for the case of 100GBASE-KR4/CR4 application, 256/257B transcoding, FEC calculation, and data distribution are also supported.  All cores include insertion and extraction points for connection to an OTN layer.  This core is suitable for use in switch or interface cards or any application that requires a PCS for 40G/100GbE. For a complete Ethernet solution, the PCS Core seamlessly integrates with the Precise-ITC 40G/100G MAC cores.

Similarly, there are 2 MAC Cores: 40G MAC, 100G MAC. Comprehensive MAC/RS statistics are supported in all MAC Cores.  TX or RX MAC statistics can be optionally “removed” to save logic area. All MAC cores are designed with low latency and cut-through features. The 1588v2 feature, 802.3br Interspersing Express Traffic Feature (IET) and 802.1Qbb PFC feature are available for 100GE MAC as optional add on.

40G/100GBASE-R PCS Core Features

PCS TX Core

  • 64B/66B encoding of incoming MII signal
  • Idle block removal (to reduce overhead for AM insertion)
  • Alignment Marker (AM) insertion. Unique marker portion of AM for each lane is s/w configurable.
  • Test pattern generation (scrambled idles)
  • Clause 45 MDIO register set
  • Error detection and interrupt reporting

Additional Features for 100GBASE-KR4/CR4

  • 256/257B transcoding (to reduce overhead for FEC insertion)
  • Scrambling (optional bypass)
  • KR4 (RS528,514) Forward Error Correction (FEC) parity calculation and insertion (2x interleaved)
  • Symbol Distribution so that output is composed of 4 lanes of 80-bits (version F) or 40-bits (version A) each

 

PCS RX Core

  • 64B/66B decoding to MII signal
  • Test pattern monitoring
  • Clause 45 MDIO register set
  • Error detection and interrupt reporting
  • Loopback from TX MII to RX MII
  • Performance Monitoring and Statistics
    • Dynamic skew measurement for each lane
    • PCS Status – link up/down
    • High bit error rate (hi-BER)
    • BER counter
    • Test pattern error counter
    • Multi-lane AM status (locked and aligned/not locked and aligned)
  • FEC Corrected code word count (with KR4 FEC enabled)
  • FEC Uncorrected code word count (with KR4 FEC enabled)
  • FEC symbol error counter (with KR4 FEC enabled)
  • FEC degrade SER (with KR4 FEC enabled)
  • Lane mapping for each of physical lanes 0-19 / 0-4

Additional Features for 100GBASE-KR4/CR4

  • Alignment lock and lane deskew of 4 lanes. Unique marker portion of AM for each lane is s/w configurable
  • Lane reordering
  • KR4 (RS528,514) FEC decoding and error correction (2x interleaved)
  • Alignment marker removal
  • Descrambling (optional bypass)
  • Reverse 256/257B transcoding

 40G / 100G MAC Core Features

  • TX FCS insertion
  • TX MAC control frame generation
    • Unicast/Multicast PAUSE frame generation by MAC client or by software
    • Software configurable PAUSE quanta
  • TX Performance Monitoring and Statistics (counters are 36-bit to accommodate 1-second of statistic counts)
    • Byte count
    • Frame count
    • PAUSE frame count
    • Multicast frame count
    • Unicast frame count
    • Undersize frame count
    • Oversize frame count
    • Frame count statistic for the following sized frames:
      • 64
      • 65-127
      • 128-255
      • 256-511
      • 512-1023
      • 1024-1518
      • 1519-1522
      • 1523-1548
      • 1549-2047
      • 2048-4095
      • 4096-8191
      • 8192-9215
  • RX FCS check and removal
  • RX PAUSE frame processing and handling
  • RX Performance Monitoring and Statistics (counters are 36-bit to accommodate 1-second of statistic counts)
    • Bad FCS
    • Bad Preamble
    • Byte count
    • Frame count
    • PAUSE frame count
    • Multicast frame count
    • Unicast frame count
    • Bad FCS frame count
    • Bad frame count
    • Bad aligned frame count
    • Undersize frame count
    • Oversize frame count
    • Frame count statistic for the following sized frames:
      • 64
      • 65-127
      • 128-255
      • 256-511
      • 512-1023
      • 1024-1518
      • 1519-1522
      • 1523-1548
      • 1549-2047
      • 2048-4095
      • 4096-8191
      • 8192-9215

 Optional Add-ons for 100G MAC:

  • 1588v2 Support
  • 802.3br Interspersing Express Traffic Support
  • 802.1Qbb PFC Support

Figure 1 MAC Block Level Diagram

Standards compliance

  • IEEE 802.3-2015